Merge branch 'main' into issue-1974-add-sai-driver

9 files changed, 337 insertions, 265 deletions

diff --git a/tests/stm32/src/bin/gpio.rs b/tests/stm32/src/bin/gpio.rs
index aad174431..49d9a60f7 100644
--- a/tests/stm32/src/bin/gpio.rs
+++ b/tests/stm32/src/bin/gpio.rs
@@ -16,24 +16,8 @@ async fn main(_spawner: Spawner) {
 
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
-    #[cfg(feature = "stm32f103c8")]
-    let (mut a, mut b) = (p.PA9, p.PA10);
-    #[cfg(feature = "stm32g491re")]
-    let (mut a, mut b) = (p.PC4, p.PC5);
-    #[cfg(feature = "stm32g071rb")]
-    let (mut a, mut b) = (p.PC4, p.PC5);
-    #[cfg(feature = "stm32f429zi")]
-    let (mut a, mut b) = (p.PG14, p.PG9);
-    #[cfg(feature = "stm32wb55rg")]
-    let (mut a, mut b) = (p.PA3, p.PA2);
-    #[cfg(feature = "stm32h755zi")]
-    let (mut a, mut b) = (p.PB6, p.PB7);
-    #[cfg(feature = "stm32u585ai")]
-    let (mut a, mut b) = (p.PD9, p.PD8);
-    #[cfg(feature = "stm32h563zi")]
-    let (mut a, mut b) = (p.PB6, p.PB7);
-    #[cfg(feature = "stm32c031c6")]
-    let (mut a, mut b) = (p.PB6, p.PB7);
+    let mut a = peri!(p, UART_RX);
+    let mut b = peri!(p, UART_TX);
 
     // Test initial output
     {
diff --git a/tests/stm32/src/bin/rtc.rs b/tests/stm32/src/bin/rtc.rs
index 7df415b44..22be6fac5 100644
--- a/tests/stm32/src/bin/rtc.rs
+++ b/tests/stm32/src/bin/rtc.rs
@@ -10,14 +10,17 @@ use chrono::{NaiveDate, NaiveDateTime};
 use common::*;
 use defmt::assert;
 use embassy_executor::Spawner;
-use embassy_stm32::rtc::{Rtc, RtcClockSource, RtcConfig};
+use embassy_stm32::rcc::RtcClockSource;
+use embassy_stm32::rtc::{Rtc, RtcConfig};
+use embassy_stm32::time::Hertz;
 use embassy_time::{Duration, Timer};
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
     let mut config = config();
 
-    config.rcc.rtc = Some(RtcClockSource::LSI);
+    config.rcc.lse = Some(Hertz(32_768));
+    config.rcc.rtc = Some(RtcClockSource::LSE);
 
     let p = embassy_stm32::init(config);
     info!("Hello World!");
diff --git a/tests/stm32/src/bin/spi.rs b/tests/stm32/src/bin/spi.rs
index e51dd5bf2..b0fb75d69 100644
--- a/tests/stm32/src/bin/spi.rs
+++ b/tests/stm32/src/bin/spi.rs
@@ -16,24 +16,10 @@ async fn main(_spawner: Spawner) {
     let p = embassy_stm32::init(config());
     info!("Hello World!");
 
-    #[cfg(feature = "stm32f103c8")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
-    #[cfg(feature = "stm32f429zi")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
-    #[cfg(feature = "stm32h755zi")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PB5, p.PA6);
-    #[cfg(feature = "stm32g491re")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
-    #[cfg(feature = "stm32g071rb")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
-    #[cfg(feature = "stm32wb55rg")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
-    #[cfg(feature = "stm32u585ai")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PE13, p.PE15, p.PE14);
-    #[cfg(feature = "stm32h563zi")]
-    let (spi, sck, mosi, miso) = (p.SPI4, p.PE12, p.PE14, p.PE13);
-    #[cfg(feature = "stm32c031c6")]
-    let (spi, sck, mosi, miso) = (p.SPI1, p.PA5, p.PA7, p.PA6);
+    let spi = peri!(p, SPI);
+    let sck = peri!(p, SPI_SCK);
+    let mosi = peri!(p, SPI_MOSI);
+    let miso = peri!(p, SPI_MISO);
 
     let mut spi_config = spi::Config::default();
     spi_config.frequency = Hertz(1_000_000);
diff --git a/tests/stm32/src/bin/spi_dma.rs b/tests/stm32/src/bin/spi_dma.rs
index d45cbe45b..212cfae5d 100644
--- a/tests/stm32/src/bin/spi_dma.rs
+++ b/tests/stm32/src/bin/spi_dma.rs
@@ -15,24 +15,12 @@ async fn main(_spawner: Spawner) {
     let p = embassy_stm32::init(config());
     info!("Hello World!");
 
-    #[cfg(feature = "stm32f103c8")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH3, p.DMA1_CH2);
-    #[cfg(feature = "stm32f429zi")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA2_CH3, p.DMA2_CH2);
-    #[cfg(feature = "stm32h755zi")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PB5, p.PA6, p.DMA1_CH0, p.DMA1_CH1);
-    #[cfg(feature = "stm32g491re")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32g071rb")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32wb55rg")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32u585ai")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PE13, p.PE15, p.PE14, p.GPDMA1_CH0, p.GPDMA1_CH1);
-    #[cfg(feature = "stm32h563zi")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI4, p.PE12, p.PE14, p.PE13, p.GPDMA1_CH0, p.GPDMA1_CH1);
-    #[cfg(feature = "stm32c031c6")]
-    let (spi, sck, mosi, miso, tx_dma, rx_dma) = (p.SPI1, p.PA5, p.PA7, p.PA6, p.DMA1_CH1, p.DMA1_CH2);
+    let spi = peri!(p, SPI);
+    let sck = peri!(p, SPI_SCK);
+    let mosi = peri!(p, SPI_MOSI);
+    let miso = peri!(p, SPI_MISO);
+    let tx_dma = peri!(p, SPI_TX_DMA);
+    let rx_dma = peri!(p, SPI_RX_DMA);
 
     let mut spi_config = spi::Config::default();
     spi_config.frequency = Hertz(1_000_000);
diff --git a/tests/stm32/src/bin/stop.rs b/tests/stm32/src/bin/stop.rs
new file mode 100644
index 000000000..48d59b794
--- /dev/null
+++ b/tests/stm32/src/bin/stop.rs
@@ -0,0 +1,71 @@
+// required-features: stop,chrono
+
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+#[path = "../common.rs"]
+mod common;
+
+use chrono::NaiveDate;
+use common::*;
+use cortex_m_rt::entry;
+use embassy_executor::Spawner;
+use embassy_stm32::low_power::{stop_with_rtc, Executor};
+use embassy_stm32::rcc::RtcClockSource;
+use embassy_stm32::rtc::{Rtc, RtcConfig};
+use embassy_stm32::time::Hertz;
+use embassy_time::{Duration, Timer};
+use static_cell::make_static;
+
+#[entry]
+fn main() -> ! {
+    Executor::take().run(|spawner| {
+        unwrap!(spawner.spawn(async_main(spawner)));
+    });
+}
+
+#[embassy_executor::task]
+async fn task_1() {
+    for _ in 0..9 {
+        info!("task 1: waiting for 500ms...");
+        Timer::after(Duration::from_millis(500)).await;
+    }
+}
+
+#[embassy_executor::task]
+async fn task_2() {
+    for _ in 0..5 {
+        info!("task 2: waiting for 1000ms...");
+        Timer::after(Duration::from_millis(1000)).await;
+    }
+
+    info!("Test OK");
+    cortex_m::asm::bkpt();
+}
+
+#[embassy_executor::task]
+async fn async_main(spawner: Spawner) {
+    let mut config = config();
+
+    config.rcc.lse = Some(Hertz(32_768));
+    config.rcc.rtc = Some(RtcClockSource::LSE);
+
+    let p = embassy_stm32::init(config);
+    info!("Hello World!");
+
+    let now = NaiveDate::from_ymd_opt(2020, 5, 15)
+        .unwrap()
+        .and_hms_opt(10, 30, 15)
+        .unwrap();
+
+    let mut rtc = Rtc::new(p.RTC, RtcConfig::default());
+
+    rtc.set_datetime(now.into()).expect("datetime not set");
+
+    let rtc = make_static!(rtc);
+
+    stop_with_rtc(rtc);
+
+    spawner.spawn(task_1()).unwrap();
+    spawner.spawn(task_2()).unwrap();
+}
diff --git a/tests/stm32/src/bin/usart.rs b/tests/stm32/src/bin/usart.rs
index 394005b82..74a81b4ec 100644
--- a/tests/stm32/src/bin/usart.rs
+++ b/tests/stm32/src/bin/usart.rs
@@ -5,38 +5,11 @@
 mod common;
 
 use common::*;
-use defmt::assert_eq;
+use defmt::{assert, assert_eq, unreachable};
 use embassy_executor::Spawner;
 use embassy_stm32::dma::NoDma;
-use embassy_stm32::usart::{Config, Error, Uart};
-use embassy_stm32::{bind_interrupts, peripherals, usart};
-use embassy_time::{Duration, Instant};
-
-#[cfg(any(
-    feature = "stm32f103c8",
-    feature = "stm32g491re",
-    feature = "stm32g071rb",
-    feature = "stm32h755zi",
-    feature = "stm32c031c6",
-))]
-bind_interrupts!(struct Irqs {
-    USART1 => usart::InterruptHandler<peripherals::USART1>;
-});
-
-#[cfg(feature = "stm32u585ai")]
-bind_interrupts!(struct Irqs {
-    USART3 => usart::InterruptHandler<peripherals::USART3>;
-});
-
-#[cfg(feature = "stm32f429zi")]
-bind_interrupts!(struct Irqs {
-    USART6 => usart::InterruptHandler<peripherals::USART6>;
-});
-
-#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
-bind_interrupts!(struct Irqs {
-    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
-});
+use embassy_stm32::usart::{Config, ConfigError, Error, Uart};
+use embassy_time::{block_for, Duration, Instant};
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -45,28 +18,14 @@ async fn main(_spawner: Spawner) {
 
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
-    #[cfg(feature = "stm32f103c8")]
-    let (mut tx, mut rx, mut usart) = (p.PA9, p.PA10, p.USART1);
-    #[cfg(feature = "stm32g491re")]
-    let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
-    #[cfg(feature = "stm32g071rb")]
-    let (mut tx, mut rx, mut usart) = (p.PC4, p.PC5, p.USART1);
-    #[cfg(feature = "stm32f429zi")]
-    let (mut tx, mut rx, mut usart) = (p.PG14, p.PG9, p.USART6);
-    #[cfg(feature = "stm32wb55rg")]
-    let (mut tx, mut rx, mut usart) = (p.PA2, p.PA3, p.LPUART1);
-    #[cfg(feature = "stm32h755zi")]
-    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
-    #[cfg(feature = "stm32u585ai")]
-    let (mut tx, mut rx, mut usart) = (p.PD8, p.PD9, p.USART3);
-    #[cfg(feature = "stm32h563zi")]
-    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.LPUART1);
-    #[cfg(feature = "stm32c031c6")]
-    let (mut tx, mut rx, mut usart) = (p.PB6, p.PB7, p.USART1);
+    let mut usart = peri!(p, UART);
+    let mut rx = peri!(p, UART_RX);
+    let mut tx = peri!(p, UART_TX);
+    let irq = irqs!(UART);
 
     {
         let config = Config::default();
-        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap();
 
         // We can't send too many bytes, they have to fit in the FIFO.
         // This is because we aren't sending+receiving at the same time.
@@ -82,13 +41,19 @@ async fn main(_spawner: Spawner) {
     // Test error handling with with an overflow error
     {
         let config = Config::default();
-        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config).unwrap();
 
         // Send enough bytes to fill the RX FIFOs off all USART versions.
-        let data = [0xC0, 0xDE, 0x12, 0x23, 0x34];
+        let data = [0; 64];
         usart.blocking_write(&data).unwrap();
         usart.blocking_flush().unwrap();
 
+        // USART can still take up to 1 bit time (?) to receive the last byte
+        // that we just flushed, so wait a bit.
+        // otherwise, we might clear the overrun flag from an *earlier* byte and
+        // it gets set again when receiving the last byte is done.
+        block_for(Duration::from_millis(1));
+
         // The error should be reported first.
         let mut buf = [0; 1];
         let err = usart.blocking_read(&mut buf);
@@ -101,22 +66,25 @@ async fn main(_spawner: Spawner) {
 
     // Test that baudrate divider is calculated correctly.
     // Do it by comparing the time it takes to send a known number of bytes.
-    for baudrate in [
-        300,
-        9600,
-        115200,
-        250_000,
-        337_934,
-        #[cfg(not(feature = "stm32f103c8"))]
-        1_000_000,
-        #[cfg(not(feature = "stm32f103c8"))]
-        2_000_000,
-    ] {
+    for baudrate in [300, 9600, 115200, 250_000, 337_934, 1_000_000, 2_000_000] {
         info!("testing baudrate {}", baudrate);
 
         let mut config = Config::default();
         config.baudrate = baudrate;
-        let mut usart = Uart::new(&mut usart, &mut rx, &mut tx, Irqs, NoDma, NoDma, config);
+        let mut usart = match Uart::new(&mut usart, &mut rx, &mut tx, irq, NoDma, NoDma, config) {
+            Ok(x) => x,
+            Err(ConfigError::BaudrateTooHigh) => {
+                info!("baudrate too high");
+                assert!(baudrate >= 1_000_000);
+                continue;
+            }
+            Err(ConfigError::BaudrateTooLow) => {
+                info!("baudrate too low");
+                assert!(baudrate <= 300);
+                continue;
+            }
+            Err(_) => unreachable!(),
+        };
 
         let n = (baudrate as usize / 100).max(64);
 
@@ -124,6 +92,7 @@ async fn main(_spawner: Spawner) {
         for _ in 0..n {
             usart.blocking_write(&[0x00]).unwrap();
         }
+        usart.blocking_flush().unwrap();
         let dur = Instant::now() - start;
         let want_dur = Duration::from_micros(n as u64 * 10 * 1_000_000 / (baudrate as u64));
         let fuzz = want_dur / 5;
diff --git a/tests/stm32/src/bin/usart_dma.rs b/tests/stm32/src/bin/usart_dma.rs
index c34d9574b..1421f6605 100644
--- a/tests/stm32/src/bin/usart_dma.rs
+++ b/tests/stm32/src/bin/usart_dma.rs
@@ -9,33 +9,6 @@ use defmt::assert_eq;
 use embassy_executor::Spawner;
 use embassy_futures::join::join;
 use embassy_stm32::usart::{Config, Uart};
-use embassy_stm32::{bind_interrupts, peripherals, usart};
-
-#[cfg(any(
-    feature = "stm32f103c8",
-    feature = "stm32g491re",
-    feature = "stm32g071rb",
-    feature = "stm32h755zi",
-    feature = "stm32c031c6",
-))]
-bind_interrupts!(struct Irqs {
-    USART1 => usart::InterruptHandler<peripherals::USART1>;
-});
-
-#[cfg(feature = "stm32u585ai")]
-bind_interrupts!(struct Irqs {
-    USART3 => usart::InterruptHandler<peripherals::USART3>;
-});
-
-#[cfg(feature = "stm32f429zi")]
-bind_interrupts!(struct Irqs {
-    USART6 => usart::InterruptHandler<peripherals::USART6>;
-});
-
-#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
-bind_interrupts!(struct Irqs {
-    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
-});
 
 #[embassy_executor::main]
 async fn main(_spawner: Spawner) {
@@ -44,27 +17,15 @@ async fn main(_spawner: Spawner) {
 
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
-    #[cfg(feature = "stm32f103c8")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, Irqs, p.DMA1_CH4, p.DMA1_CH5);
-    #[cfg(feature = "stm32g491re")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32g071rb")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32f429zi")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, Irqs, p.DMA2_CH6, p.DMA2_CH1);
-    #[cfg(feature = "stm32wb55rg")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32h755zi")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH0, p.DMA1_CH1);
-    #[cfg(feature = "stm32u585ai")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
-    #[cfg(feature = "stm32h563zi")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.LPUART1, Irqs, p.GPDMA1_CH0, p.GPDMA1_CH1);
-    #[cfg(feature = "stm32c031c6")]
-    let (tx, rx, usart, irq, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, Irqs, p.DMA1_CH1, p.DMA1_CH2);
+    let usart = peri!(p, UART);
+    let rx = peri!(p, UART_RX);
+    let tx = peri!(p, UART_TX);
+    let rx_dma = peri!(p, UART_RX_DMA);
+    let tx_dma = peri!(p, UART_TX_DMA);
+    let irq = irqs!(UART);
 
     let config = Config::default();
-    let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config);
+    let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config).unwrap();
 
     const LEN: usize = 128;
     let mut tx_buf = [0; LEN];
diff --git a/tests/stm32/src/bin/usart_rx_ringbuffered.rs b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
index c8dd2643b..1ee7e596d 100644
--- a/tests/stm32/src/bin/usart_rx_ringbuffered.rs
+++ b/tests/stm32/src/bin/usart_rx_ringbuffered.rs
@@ -10,87 +10,10 @@ use common::*;
 use defmt::{assert_eq, panic};
 use embassy_executor::Spawner;
 use embassy_stm32::usart::{Config, DataBits, Parity, RingBufferedUartRx, StopBits, Uart, UartTx};
-use embassy_stm32::{bind_interrupts, peripherals, usart};
 use embassy_time::{Duration, Timer};
 use rand_chacha::ChaCha8Rng;
 use rand_core::{RngCore, SeedableRng};
 
-#[cfg(any(
-    feature = "stm32f103c8",
-    feature = "stm32g491re",
-    feature = "stm32g071rb",
-    feature = "stm32h755zi",
-    feature = "stm32c031c6",
-))]
-bind_interrupts!(struct Irqs {
-    USART1 => usart::InterruptHandler<peripherals::USART1>;
-});
-
-#[cfg(feature = "stm32u585ai")]
-bind_interrupts!(struct Irqs {
-    USART3 => usart::InterruptHandler<peripherals::USART3>;
-});
-
-#[cfg(feature = "stm32f429zi")]
-bind_interrupts!(struct Irqs {
-    USART1 => usart::InterruptHandler<peripherals::USART1>;
-    USART6 => usart::InterruptHandler<peripherals::USART6>;
-});
-
-#[cfg(any(feature = "stm32wb55rg", feature = "stm32h563zi"))]
-bind_interrupts!(struct Irqs {
-    LPUART1 => usart::InterruptHandler<peripherals::LPUART1>;
-});
-
-#[cfg(feature = "stm32f103c8")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART1;
-    pub type TxDma = embassy_stm32::peripherals::DMA1_CH4;
-    pub type RxDma = embassy_stm32::peripherals::DMA1_CH5;
-}
-#[cfg(feature = "stm32g491re")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART1;
-    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
-    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
-}
-#[cfg(feature = "stm32g071rb")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART1;
-    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
-    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
-}
-#[cfg(feature = "stm32f429zi")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART6;
-    pub type TxDma = embassy_stm32::peripherals::DMA2_CH6;
-    pub type RxDma = embassy_stm32::peripherals::DMA2_CH1;
-}
-#[cfg(feature = "stm32wb55rg")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::LPUART1;
-    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
-    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
-}
-#[cfg(feature = "stm32h755zi")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART1;
-    pub type TxDma = embassy_stm32::peripherals::DMA1_CH0;
-    pub type RxDma = embassy_stm32::peripherals::DMA1_CH1;
-}
-#[cfg(feature = "stm32u585ai")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART3;
-    pub type TxDma = embassy_stm32::peripherals::GPDMA1_CH0;
-    pub type RxDma = embassy_stm32::peripherals::GPDMA1_CH1;
-}
-#[cfg(feature = "stm32c031c6")]
-mod board {
-    pub type Uart = embassy_stm32::peripherals::USART1;
-    pub type TxDma = embassy_stm32::peripherals::DMA1_CH1;
-    pub type RxDma = embassy_stm32::peripherals::DMA1_CH2;
-}
-
 const DMA_BUF_SIZE: usize = 256;
 
 #[embassy_executor::main]
@@ -100,22 +23,12 @@ async fn main(spawner: Spawner) {
 
     // Arduino pins D0 and D1
     // They're connected together with a 1K resistor.
-    #[cfg(feature = "stm32f103c8")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA9, p.PA10, p.USART1, p.DMA1_CH4, p.DMA1_CH5);
-    #[cfg(feature = "stm32g491re")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32g071rb")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PC4, p.PC5, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32f429zi")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PG14, p.PG9, p.USART6, p.DMA2_CH6, p.DMA2_CH1);
-    #[cfg(feature = "stm32wb55rg")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PA2, p.PA3, p.LPUART1, p.DMA1_CH1, p.DMA1_CH2);
-    #[cfg(feature = "stm32h755zi")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH0, p.DMA1_CH1);
-    #[cfg(feature = "stm32u585ai")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PD8, p.PD9, p.USART3, p.GPDMA1_CH0, p.GPDMA1_CH1);
-    #[cfg(feature = "stm32c031c6")]
-    let (tx, rx, usart, tx_dma, rx_dma) = (p.PB6, p.PB7, p.USART1, p.DMA1_CH1, p.DMA1_CH2);
+    let usart = peri!(p, UART);
+    let rx = peri!(p, UART_RX);
+    let tx = peri!(p, UART_TX);
+    let rx_dma = peri!(p, UART_RX_DMA);
+    let tx_dma = peri!(p, UART_TX_DMA);
+    let irq = irqs!(UART);
 
     // To run this test, use the saturating_serial test utility to saturate the serial port
 
@@ -127,7 +40,7 @@ async fn main(spawner: Spawner) {
     config.stop_bits = StopBits::STOP1;
     config.parity = Parity::ParityNone;
 
-    let usart = Uart::new(usart, rx, tx, Irqs, tx_dma, rx_dma, config);
+    let usart = Uart::new(usart, rx, tx, irq, tx_dma, rx_dma, config).unwrap();
     let (tx, rx) = usart.split();
     static mut DMA_BUF: [u8; DMA_BUF_SIZE] = [0; DMA_BUF_SIZE];
     let dma_buf = unsafe { DMA_BUF.as_mut() };
@@ -139,7 +52,7 @@ async fn main(spawner: Spawner) {
 }
 
 #[embassy_executor::task]
-async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
+async fn transmit_task(mut tx: UartTx<'static, peris::UART, peris::UART_TX_DMA>) {
     // workaround https://github.com/embassy-rs/embassy/issues/1426
     Timer::after(Duration::from_millis(100) as _).await;
 
@@ -162,7 +75,7 @@ async fn transmit_task(mut tx: UartTx<'static, board::Uart, board::TxDma>) {
 }
 
 #[embassy_executor::task]
-async fn receive_task(mut rx: RingBufferedUartRx<'static, board::Uart, board::RxDma>) {
+async fn receive_task(mut rx: RingBufferedUartRx<'static, peris::UART, peris::UART_RX_DMA>) {
     info!("Ready to receive...");
 
     let mut rng = ChaCha8Rng::seed_from_u64(1337);
diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs
index ca5cb43ac..9c0b8c39e 100644
--- a/tests/stm32/src/common.rs
+++ b/tests/stm32/src/common.rs
@@ -24,6 +24,131 @@ teleprobe_meta::target!(b"iot-stm32u585ai");
 teleprobe_meta::target!(b"nucleo-stm32h563zi");
 #[cfg(feature = "stm32c031c6")]
 teleprobe_meta::target!(b"nucleo-stm32c031c6");
+#[cfg(feature = "stm32l073rz")]
+teleprobe_meta::target!(b"nucleo-stm32l073rz");
+#[cfg(feature = "stm32l152re")]
+teleprobe_meta::target!(b"nucleo-stm32l152re");
+#[cfg(feature = "stm32l4a6zg")]
+teleprobe_meta::target!(b"nucleo-stm32l4a6zg");
+#[cfg(feature = "stm32l4r5zi")]
+teleprobe_meta::target!(b"nucleo-stm32l4r5zi");
+#[cfg(feature = "stm32l552ze")]
+teleprobe_meta::target!(b"nucleo-stm32l552ze");
+
+macro_rules! define_peris {
+    ($($name:ident = $peri:ident,)* $(@irq $irq_name:ident = $irq_code:tt,)*) => {
+        #[allow(unused_macros)]
+        macro_rules! peri {
+            $(
+                ($p:expr, $name) => {
+                    $p.$peri
+                };
+            )*
+        }
+        #[allow(unused_macros)]
+        macro_rules! irqs {
+            $(
+                ($irq_name) => {{
+                    embassy_stm32::bind_interrupts!(struct Irqs $irq_code);
+                    Irqs
+                }};
+            )*
+        }
+
+        #[allow(unused)]
+        #[allow(non_camel_case_types)]
+        pub mod peris {
+            $(
+                pub type $name = embassy_stm32::peripherals::$peri;
+            )*
+        }
+    };
+}
+
+#[cfg(feature = "stm32f103c8")]
+define_peris!(
+    UART = USART1, UART_TX = PA9, UART_RX = PA10, UART_TX_DMA = DMA1_CH4, UART_RX_DMA = DMA1_CH5,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
+);
+#[cfg(feature = "stm32g491re")]
+define_peris!(
+    UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
+);
+#[cfg(feature = "stm32g071rb")]
+define_peris!(
+    UART = USART1, UART_TX = PC4, UART_RX = PC5, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
+);
+#[cfg(feature = "stm32f429zi")]
+define_peris!(
+    UART = USART6, UART_TX = PG14, UART_RX = PG9, UART_TX_DMA = DMA2_CH6, UART_RX_DMA = DMA2_CH1,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA2_CH3, SPI_RX_DMA = DMA2_CH2,
+    @irq UART = {USART6 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART6>;},
+);
+#[cfg(feature = "stm32wb55rg")]
+define_peris!(
+    UART = LPUART1, UART_TX = PA2, UART_RX = PA3, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
+);
+#[cfg(feature = "stm32h755zi")]
+define_peris!(
+    UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH0, UART_RX_DMA = DMA1_CH1,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PB5, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH0, SPI_RX_DMA = DMA1_CH1,
+    @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
+);
+#[cfg(feature = "stm32u585ai")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
+    SPI = SPI1, SPI_SCK = PE13, SPI_MOSI = PE15, SPI_MISO = PE14, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32h563zi")]
+define_peris!(
+    UART = LPUART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = GPDMA1_CH0, UART_RX_DMA = GPDMA1_CH1,
+    SPI = SPI4, SPI_SCK = PE12, SPI_MOSI = PE14, SPI_MISO = PE13, SPI_TX_DMA = GPDMA1_CH0, SPI_RX_DMA = GPDMA1_CH1,
+    @irq UART = {LPUART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::LPUART1>;},
+);
+#[cfg(feature = "stm32c031c6")]
+define_peris!(
+    UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART1>;},
+);
+#[cfg(feature = "stm32l4a6zg")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32l4r5zi")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32l073rz")]
+define_peris!(
+    UART = USART4, UART_TX = PA0, UART_RX = PA1, UART_TX_DMA = DMA1_CH3, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART4_5 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART4>;},
+);
+#[cfg(feature = "stm32l152re")]
+define_peris!(
+    UART = USART3, UART_TX = PB10, UART_RX = PB11, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH3, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
+#[cfg(feature = "stm32l552ze")]
+define_peris!(
+    UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2,
+    SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2,
+    @irq UART = {USART3 => embassy_stm32::usart::InterruptHandler<embassy_stm32::peripherals::USART3>;},
+);
 
 pub fn config() -> Config {
     #[allow(unused_mut)]
@@ -31,14 +156,86 @@ pub fn config() -> Config {
 
     #[cfg(feature = "stm32h755zi")]
     {
-        config.rcc.sys_ck = Some(Hertz(400_000_000));
-        config.rcc.pll1.q_ck = Some(Hertz(100_000_000));
-        config.rcc.adc_clock_source = embassy_stm32::rcc::AdcClockSource::PerCk;
+        use embassy_stm32::rcc::*;
+        config.rcc.hsi = Some(Hsi::Mhz64);
+        config.rcc.csi = true;
+        config.rcc.pll_src = PllSource::Hsi;
+        config.rcc.pll1 = Some(Pll {
+            prediv: 4,
+            mul: 50,
+            divp: Some(2),
+            divq: Some(8), // SPI1 cksel defaults to pll1_q
+            divr: None,
+        });
+        config.rcc.pll2 = Some(Pll {
+            prediv: 4,
+            mul: 50,
+            divp: Some(8), // 100mhz
+            divq: None,
+            divr: None,
+        });
+        config.rcc.sys = Sysclk::Pll1P; // 400 Mhz
+        config.rcc.ahb_pre = AHBPrescaler::DIV2; // 200 Mhz
+        config.rcc.apb1_pre = APBPrescaler::DIV2; // 100 Mhz
+        config.rcc.apb2_pre = APBPrescaler::DIV2; // 100 Mhz
+        config.rcc.apb3_pre = APBPrescaler::DIV2; // 100 Mhz
+        config.rcc.apb4_pre = APBPrescaler::DIV2; // 100 Mhz
+        config.rcc.voltage_scale = VoltageScale::Scale1;
+        config.rcc.adc_clock_source = AdcClockSource::PLL2_P;
+    }
+
+    #[cfg(any(feature = "stm32l4a6zg", feature = "stm32l4r5zi"))]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 72Mhz clock (16 / 1 * 18 / 4)
+            PLLSource::HSI16,
+            PLLClkDiv::Div4,
+            PLLSrcDiv::Div1,
+            PLLMul::Mul18,
+            Some(PLLClkDiv::Div6), // 48Mhz (16 / 1 * 18 / 6)
+        );
+    }
+
+    #[cfg(any(feature = "stm32l552ze"))]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 110Mhz clock (16 / 4 * 55 / 2)
+            PLLSource::HSI16,
+            PLLClkDiv::Div2,
+            PLLSrcDiv::Div4,
+            PLLMul::Mul55,
+            None,
+        );
     }
 
     #[cfg(feature = "stm32u585ai")]
     {
-        config.rcc.mux = embassy_stm32::rcc::ClockSrc::MSI(embassy_stm32::rcc::MSIRange::Range48mhz);
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::MSI(MSIRange::Range48mhz);
+    }
+
+    #[cfg(feature = "stm32l073rz")]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 32Mhz clock (16 * 4 / 2)
+            PLLSource::HSI16,
+            PLLMul::Mul4,
+            PLLDiv::Div2,
+        );
+    }
+
+    #[cfg(any(feature = "stm32l152re"))]
+    {
+        use embassy_stm32::rcc::*;
+        config.rcc.mux = ClockSrc::PLL(
+            // 32Mhz clock (16 * 4 / 2)
+            PLLSource::HSI,
+            PLLMul::Mul4,
+            PLLDiv::Div2,
+        );
     }
 
     config