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* Merge pull request #2035 from pbert519/stm_reset_and_enableDario Nieuwenhuis2023-10-123-6/+5
|\ | | | | | | STM32: combine RccPeripherals reset() and enable() to enable_and_reset()
| * enable clock firstpbert2023-10-123-5/+5
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| * STM32: combine RccPeripherals reset() and enable() to reset_and_enable()pbert2023-10-123-6/+5
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* | Merge pull request #2033 from andresovela/stm32-add-timeout-to-i2cUlf Lilleengen2023-10-123-21/+6
|\ \ | |/ |/| | | stm32: add timeout to I2C driver
| * Remove more unused stuffAndres Oliva2023-10-113-3/+0
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| * stm32: add timeout to I2C driverAndres Oliva2023-10-103-18/+6
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* | net: remove atomic-polyfill.Dario Nieuwenhuis2023-10-121-2/+2
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* | stm32/rcc: add LSE/LSI to all chips, add RTC to more chips.Dario Nieuwenhuis2023-10-117-24/+13
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* | stm32/rcc: rename HSE32 to HSEDario Nieuwenhuis2023-10-116-6/+6
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* | stm32/rcc: use more PLL etc enums from PAC.Dario Nieuwenhuis2023-10-113-5/+5
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* Patch tests & examplesGabriel Górski2023-10-095-10/+5
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* stm32/rcc: use PLL enums from PAC.Dario Nieuwenhuis2023-10-0928-104/+108
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* Merge pull request #2018 from jamesmunns/add-derivesDario Nieuwenhuis2023-10-072-2/+2
|\ | | | | | | Add some uncontroversial derives to Error types
| * Add some uncontroversial derives to Error typesJames Munns2023-10-062-2/+2
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* | Merge pull request #2015 from willglynn/stm32u5_faster_clocksDario Nieuwenhuis2023-10-061-1/+6
|\ \ | | | | | | | | | stm32: u5: implement >55 MHz clock speeds
| * | stm32: u5: implement >55 MHz clock speedsWill Glynn2023-10-051-1/+6
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit allows STM32U5 devices to operate at 160 MHz. On STM32U5, MSIS can run at 48 MHz and HSE can reach 50 MHz. Faster clocks require using PLL1's R output, though PLL1 can serve other functions besides using the R output for the system clock. This commit extracts a public `PllConfig` struct, primarily to place associated constructors on that type, but also with an eye towards enabling the P and Q outputs in a later commit. STM32U5 PLLs have various frequency requirements on each stage: after the `m` prescaler, after the `n` multiplier, and after the `r` divider. This commit implements the associated checks as assertions. This commit fixes clock calculation and PLL register configuration errors in PLL initialization. STM32U5 has a PWR peripheral which can be configured to push Vcore into different voltage ranges. System clocks exceeding 55 MHz require range 2, and system clocks exceeding 110 MHz require range 1. This commit adds `voltage_range` to `Config` and configures PWR as directed. The voltage range implies different performance limits on various clock signals, including inside a PLL. This commit implements voltage range <-> frequency range checks as assertions, and extracts the otherwise-repeated MSIS, HSI16, and HSE initialization into private methods on `Config`. STM32U5 frequencies above 55 MHz require using the PWR EPOD booster. The EPOD booster requires configuring a second `m` term for PLL1, `mboost`, such that it falls in a particular range. (Recall that >50 MHz cannot be reached without PLL1, so there is no scenario where EPOD is needed but PLL1 is not.) This commit configures and enables the EPOD booster automatically as required.
* | stm32: implement MCO for all chips.Dario Nieuwenhuis2023-10-074-9/+9
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* | h7: implement RTC and LSE clock configurationMatt Ickstadt2023-10-062-1/+41
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* stm32: update metapac and fix opamp chxoviat2023-10-041-2/+2
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* update embedded-io, embedded-nal-async.Dario Nieuwenhuis2023-10-0411-18/+18
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* stm32: add opamp mod and update pacxoviat2023-10-031-0/+59
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* Add wait for DHCP in rp wifi_tcp_serverKingCol132023-10-021-1/+8
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* Update firmware size in rp wifi examplesKingCol132023-10-024-4/+4
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* Remove impl_trait_projections.Dario Nieuwenhuis2023-10-021-1/+1
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* feat: allow schmitt, slew, and drive strength be set from Flex, Input, OutputJonathan Dickinson2023-10-011-0/+3
| | | | Allows the schmitt, slew and drive strength to be set from Flex. Input and Output[OpenDrain] also expose the appropriate setters.
* bump wasm-pack versionbrian horakh2023-09-301-1/+1
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* typobrian horakh2023-09-301-1/+1
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* stm32/rtc: enable lse in examples.Dario Nieuwenhuis2023-09-302-0/+3
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* stm32/adc: cleanup f1, f3, v1, and v2xoviat2023-09-274-7/+13
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* stm32/usart: return error instead of panicking on bad baudrate.Dario Nieuwenhuis2023-09-2616-21/+19
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* Update rust-lorawan crate versions.ceekdee2023-09-254-24/+8
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* Update for rust-lorawan and lora-phy version 2.ceekdee2023-09-2420-103/+54
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* stm32: fix rtc exampleluveti2023-09-241-0/+1
| | | lsi must be enabled otherwise a assertion fails
* stm32/rcc: unify h5 and h7.Dario Nieuwenhuis2023-09-2119-74/+310
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* stm32/adc: make v1 async and leave enxoviat2023-09-201-3/+9
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* Merge pull request #1919 from xoviat/adcxoviat2023-09-181-9/+14
|\ | | | | | | adc/f3: add async conversion
| * stm32/adc: add async conversionxoviat2023-09-181-9/+14
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* | stm32: use PAC enums for VOS.Dario Nieuwenhuis2023-09-182-2/+2
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* Merge pull request #1915 from xoviat/rccxoviat2023-09-163-10/+10
|\ | | | | | | stm32/rcc: convert bus prescalers to pac enums
| * stm32/rcc: convert bus prescalers to pac enumsxoviat2023-09-163-10/+10
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* | Merge pull request #1916 from wkf/mainxoviat2023-09-164-8/+8
|\ \ | |/ |/| | | Update stm32wb examples to use ble/mac firmware.
| * Update stm32wb examples to use ble/mac firmware.Will Farrell2023-09-164-8/+8
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* | stm32: add stm32wba support.Dario Nieuwenhuis2023-09-165-0/+98
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* | feat: bump embassy-sync version to 0.3.0Ulf Lilleengen2023-09-1435-35/+35
| | | | | | | | Update changelog in preparation for release
* | stm32: bump fmc versionTobias Breitwieser2023-09-142-2/+2
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* | Merge pull request #1834 from dave-andersen/mainDario Nieuwenhuis2023-09-101-3/+4
|\ \ | | | | | | | | | Fix timing on RP2040 pio_ws2812.rs example
| * | Fix timing on RP2040 pio_ws2812.rs exampleDave Andersen2023-08-271-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | The example spins too fast so it doesn't appear to change; it's delaying for microseconds instead of milliseconds. This commit slows it down and adds a comment noting the pin mapping for the Adafruit feather rp2040+RFM95 LoRA module, which has its Neopixel on pin 4 instead of 16.
* | | Add example, fix small bug in respond_and_fillCaleb Jamison2023-09-101-0/+118
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* | | stm32/f3: add high res for hrtim and misc.xoviat2023-09-102-6/+12
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* | | Merge pull request #1878 from xoviat/adcxoviat2023-09-101-5/+18
|\ \ \ | | | | | | | | | | | | stm32: fix adc f3 and example
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