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| * stm32 CORDIC: exclude stm32u5aeZio Pan2024-03-261-1/+1
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| * stm32 CORDIC: add g491re back to cordic testeZio Pan2024-03-232-9/+4
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| * stm32 CORDIC: re-design APIeZio Pan2024-03-231-62/+48
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| * stm32 CORDIC: make HIL runeZio Pan2024-03-231-12/+14
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| * stm32 CORDIC: add HIL testeZio Pan2024-03-233-4/+163
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* | rename PWM_CH to PWM_SLICEAlexandru RADOVICI2024-04-021-7/+7
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* | stm32/can: simplify bxcan api, merging bx::* into the main structs.Dario Nieuwenhuis2024-04-021-10/+9
| | | | | | | | | | | | The bx::* separate structs (Can, Rx, Tx) and separate `Instance` trait are a relic from the `bxcan` crate. Remove them, move the functionality into the main structs.
* | CAN: Use the same testing code for BXCAN and FDCAN h/w.Corey Schuhen2024-03-283-194/+163
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* | CAN: Unify API's between BXCAN and FDCAN. Use Envelope for all read methods ↵Corey Schuhen2024-03-281-12/+12
| | | | | | | | instead of a tuple sometimes.
* | Remove ad-hoc fixes for setting the IOSV bit to trueEmilie Burgun2024-03-261-7/+0
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* Fix warnings in recent nightly.Dario Nieuwenhuis2024-03-203-12/+24
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* FDCAN: Fix offset issue preventing CAN2 and CAN3 from working.Corey Schuhen2024-03-161-2/+51
| | | | Fix for not H7
* Merge pull request #2701 from timokroeger/stm32-ucpdDario Nieuwenhuis2024-03-152-1/+127
|\ | | | | | | STM32 UCPD CI Test
| * tests/stm32: run ucpd only on g0.Dario Nieuwenhuis2024-03-152-1/+2
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| * [UCPD] Add unit test for stm32g071rb boardTimo Kröger2024-03-152-1/+126
| | | | | | | | One test for changing the CC line pull-up resistor is skipped for now.
* | Use Result instead of Option for Frame creation.Corey Schuhen2024-03-131-1/+1
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* | Shared frame types.Corey Schuhen2024-03-131-2/+2
| | | | | | | | | | | | Remove BXCAN speciffic id and frame modules Remove SizedClassicData
* | Merge pull request #2691 from caleb-garrett/cryp-dmaDario Nieuwenhuis2024-03-122-10/+21
|\ \ | | | | | | | | | STM32 CRYP DMA
| * | rustfmtCaleb Garrett2024-03-121-5/+2
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| * | Correct cryp CI build issues.Caleb Garrett2024-03-121-2/+4
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| * | Add async CRYP to test.Caleb Garrett2024-03-122-10/+22
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* / Make use of internal BXCAN crate work. Tested on stm32f103 with real bus and ↵Corey Schuhen2024-03-071-2/+2
|/ | | | | | HIL tests. Fix
* stm32/rcc: port c0 to new api. Add c0 HSIKER/HSISYS support.Dario Nieuwenhuis2024-03-041-0/+11
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* stm32/rcc: port g0 to new api.Dario Nieuwenhuis2024-03-041-0/+13
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* stm32/rcc: g4: consistent PllSource, add pll pqr limits, simplify a bit.Dario Nieuwenhuis2024-03-041-1/+1
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* stm32: autogenerate mux config for all chips.Dario Nieuwenhuis2024-03-012-26/+25
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* Remove CRYP from F429.Caleb Garrett2024-02-291-1/+1
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* Remove CRYP from H7A3.Caleb Garrett2024-02-291-1/+1
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* Fix H7 CRYP operation.Caleb Garrett2024-02-291-2/+2
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* Run gen_test.pyCaleb Garrett2024-02-251-1/+1
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* rustfmtCaleb Garrett2024-02-251-3/+1
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* Add CRYP test.Caleb Garrett2024-02-252-2/+80
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* stm32/rcc: unify naming sysclk field to `sys`, enum to `Sysclk`.Dario Nieuwenhuis2024-02-261-7/+7
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* FDCAN: Don't require internal module for public API.Corey Schuhen2024-02-251-2/+2
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* stm32/dma: add AnyChannel, add support for BDMA on H7.Dario Nieuwenhuis2024-02-241-1/+1
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* stm32/tests: run stm32u5a5zj from flash due to wrong RAM size in stm32-data.Dario Nieuwenhuis2024-02-232-1/+2
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* stm32/rcc: port U5 to new API, add all PLLs, all HSE modes.Dario Nieuwenhuis2024-02-231-1/+12
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* Merge pull request #2588 from cschuhen/feature/fdcan_bufferedDario Nieuwenhuis2024-02-232-82/+30
|\ | | | | | | Add FDCAN Buffered mode.
| * Remove the OperatingMode typestatesCorey Schuhen2024-02-181-1/+1
| | | | | | | | | | | | Instead have two explcit types(without the mode generic arg)types: - One for config - One for all operating modes
| * Port FDCAN HAL to use PAC directly instead of fdcan crate.Corey Schuhen2024-02-172-81/+29
| | | | | | | | | | | | - Provide separate FDCAN capable and Classic CAN API's - Don't use fdcan crate dep anymore - Provide embedded-can traits.
* | Merge pull request #2611 from CBJamo/rp2040_i2c_improvementsJames Munns2024-02-222-36/+59
|\ \ | | | | | | | | | Rp2040 i2c improvements
| * | Add SetConfig impl to rp2040 i2cCaleb Jamison2024-02-222-36/+59
| |/ | | | | | | Also expand test to cover 1kHz, 100kHz, 400kHz, and 1MHz speeds.
* | nrf/uart: add buffereduart drop, rxonly, txonly tests.Dario Nieuwenhuis2024-02-212-42/+127
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* | nrf/buffered_uart: refactor so rx/tx halves are independent.Dario Nieuwenhuis2024-02-212-2/+2
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* tests/stm32: add stm32f091rc, stm32h503rb.Dario Nieuwenhuis2024-02-174-1/+62
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* Merge pull request #2564 from embassy-rs/rcc-f1-updateDario Nieuwenhuis2024-02-142-2/+20
|\ | | | | | | stm32/rcc: port F1, F0 to new API.
| * stm32/rcc: port F1 to new API.Dario Nieuwenhuis2024-02-132-2/+20
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* | Added HMAC to STM32 hash test.Caleb Garrett2024-02-132-0/+23
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* | Update STM32 hash test.Caleb Garrett2024-02-121-2/+2
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* | Merge pull request #2528 from caleb-garrett/hashDario Nieuwenhuis2024-02-132-7/+92
|\ \ | |/ |/| STM32 Hash Accelerator