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* Enable STM32N6 DMA and I2C clock sourcesLambert Sartory2025-12-112-5/+0
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* dma: add functionsxoviat2025-12-091-0/+58
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* low-power: rework stoppableperipheral traitsxoviat2025-12-061-22/+18
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* GPDMA suspend channel before reset if already enabledAlbin Hedman2025-12-031-0/+5
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* timer: clamp compare value before dmaxoviat2025-12-011-0/+4
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* stm32: extract busychannel into common apixoviat2025-11-254-58/+28
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* low power: store stop mode for dma channelsxoviat2025-11-214-18/+87
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* cfg out unused itemseverdrone2025-11-112-0/+5
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* Rustfmt for edition 2024.Dario Nieuwenhuis2025-10-065-7/+7
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* fix: ping-pong helper DMA directionAdrian Figueroa2025-09-053-9/+25
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* refactor: make dma implementations match in interfaceelagil2025-09-053-61/+69
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* fix: consolidate namingelagil2025-09-052-15/+15
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* fix: buildelagil2025-09-052-86/+29
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* fix: renamed simple table as per ST nomenclatureetiennecollin2025-09-051-4/+4
| | | | Co-authored-by: elagil <[email protected]>
* fix: removed unnecessary mut referenceetiennecollin2025-09-051-3/+3
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* feat: use register wrappers instead of u32 for LinearItemetiennecollin2025-09-051-15/+12
| | | | | | | Since the register structs are no-field structs with `repr(transparent)`, we can use them in the LinearItem with `repr(C)`. This allows the user to call the convenient named setter functions for the registers instead of manually changing the bits of the u32.
* feat: add new_with_table() initializer for ring-buffers and removal of ↵etiennecollin2025-09-053-71/+84
| | | | | | | | | | | | | | | | RegisterUpdaters - It is now possible to pass a linked-list table to the ring-buffer with the `new_with_table()` function or use the `new()` function for a basic ring-buffer setup. - A `simple_ring_buffer_table()` function was added to the read and write ring-buffers to generate the same table as the one created by `new()` in case the user only wants to customize the default table options. - RegisterUpdaters have been removed as the user now has direct access to the table and its items if needed. See: https://github.com/elagil/embassy/pull/1#issuecomment-2891997294
* fix: moved channel configuration from new() to start()etiennecollin2025-09-051-6/+4
| | | | | | See this PR comment explaining why configuration in `new()` is a bad idea: https://github.com/embassy-rs/embassy/pull/3923#issuecomment-2889193736
* fix: removed functions exposing channel registersetiennecollin2025-09-052-21/+0
| | | | These functions could be used to cause UB.
* feat: custom dma configuration using RegisterUpdaters structetiennecollin2025-09-053-7/+51
| | | | | See this PR comment: https://github.com/embassy-rs/embassy/pull/3923#issuecomment-2889283939
* fix: suspend before resetetiennecollin2025-09-051-0/+3
| | | | | This follows the procedure outlined in the STM32U5 reference manual at page 696.
* feat: use provided TransferOptions instead of defaultsetiennecollin2025-09-051-4/+4
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* feat: custom DMA channel configurationetiennecollin2025-09-052-6/+27
| | | | | | | | | | See https://github.com/embassy-rs/embassy/pull/3923#issuecomment-2888810087 The default configuration of the channel which was done in `start()` is now done in `new()` this allows overriding some settings through the new `get_dma_channel` function. Only ringbuffers support this; `LinkedListTransfer` and `Transfer` do not support that yet.
* fix: writing reserved bitsetiennecollin2025-09-051-2/+20
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* fix: modified dma channel state managementetiennecollin2025-09-052-43/+77
| | | | | See https://github.com/embassy-rs/embassy/pull/3923#discussion_r2094570176
* fix: docstringelagil2025-09-051-1/+1
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* fix: build warningselagil2025-09-051-8/+0
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* fix: simplifyelagil2025-09-052-73/+5
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* fix: build issueselagil2025-09-052-17/+13
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* feat: wip, write buffer in halveselagil2025-09-052-107/+53
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* chore: change namingelagil2025-09-053-57/+87
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* fix: wip gpdmaelagil2025-09-052-15/+16
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* fix: load/store orderingelagil2025-09-052-6/+6
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* fix: read transfer optionselagil2025-09-051-12/+7
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* chore: clean up transfer optionselagil2025-09-053-36/+6
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* fix: transfer optionselagil2025-09-052-1/+8
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* fix: disable half-complete interruptelagil2025-09-051-2/+2
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* style: formattingelagil2025-09-052-17/+11
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* feat: ping-pong bufferselagil2025-09-053-16/+92
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* feat: gpdma support (wip)elagil2025-09-055-91/+307
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* feat: GPDAM linked-list + ringbuffer supportelagil2025-09-054-75/+825
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* stm32/dma: fix packing/unpacking not working.Dario Nieuwenhuis2025-07-043-32/+49
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* stm32/dma: add missing fence on BDMA start.Dario Nieuwenhuis2025-07-041-3/+3
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* Remove Peripheral trait, rename PeripheralRef->Peri.Dario Nieuwenhuis2025-03-274-65/+49
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* stm32/cryp: remove DMA generic param.Dario Nieuwenhuis2025-03-251-11/+0
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* stm32/hash: remove DMA generic param.Dario Nieuwenhuis2025-03-251-3/+3
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* Reset complete count global variable on Dma configurenoracarmig2025-01-261-0/+2
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* Merge pull request #3704 from CNLHC/pwm_support_gp32Dario Nieuwenhuis2025-01-212-29/+47
|\ | | | | | | feat: Add 32-bit timer support for waveform function
| * refactor: update write DMA transfer function to use separate memory word typeLiu Hancheng2025-01-051-5/+5
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| * refactor: update DMA transfer functions to support separate memory and ↵Liu Hancheng2025-01-041-14/+18
| | | | | | | | peripheral word types
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